The invention relates to schottky junction diodes capable of operation at millimeter and submillimeter wave frequencies.
Characteristics useful for the development of a high quality diode intended for millimeter and submillimeter wave frequency operation include the ability to accurately predict skin effect contribution near the operating frequency from theoretical calculation based on device geometry, and the ability to verify these calculations by a low frequency measurement of the device.
Desirable device characteristics required for high performance mixers, detectors and imaging applications at the noted frequencies include an extremely low value of junction capacitance (near or below 10.sup.-16 farad) at zero volt bias, a junction area in the 10.sup.-8 to 10.sup.-10 cm.sup.2 range, minimum variation in junction capacitance (ideally zero) as a function of bias potential, a low value of series resistance, a low value of parasitic capacitance (e.g. 1/10 of the capacitance), and near unity ideality factor.
The ideality factor is a measure of the perfection of the junction and is derived from the diode current equation ##EQU1## where I is the diode current
I.sub.s is the saturation current PA0 n is the ideality factor PA0 q is electronic charge PA0 V is voltage across anode to cathode PA0 K is Boltzman's constant PA0 T is absolute temperature
A perfect diode will have an ideality factor of unity.
In prior devices, such as planar point contact diodes and planar beam lead devices, the combination of all the above noted characteristics is not present in any one device. Furthermore, epitaxial N layers and N+ substrates are generally used universally as the basic substrate for such prior devices. The disadvantages of using this type of substrate include restricting fabrication to a single device, the necessity of measuring ohmic series resistance at or near the operating frequency which is a difficult and often impossible measurement at 100 gigahertz or higher frequency, poor reliability due to inherent premature breakdown, and poor collection of current resulting in high series resistance.
FIGS. 1-4 illustrate prior devices. FIGS. 1 and 2 show a typical circular schottky junction 2 on N layer 4 formed by etching a hole 6 in dielectric layer 8, such as SiO.sub.2 or Si.sub.3 N.sub.4 followed by evaporation of schottky metal and then etching of the excess metal to form the schottky metal contact 10. The lower portion of the device is an N+ substrate 12 to which ohmic contact 14 is made on the bottom surface. The smallest junction diameter possible with this type of fabrication is about 1 micron. Since the holes such as 6 in the dielectric layer 8 are chemically etched, the uniformity of junction diameter suffers as the dielectric thickness is increased. Current flow is from junction 2 through the entire device to ohmic contact 14. The skin effect loss is severe and occurs as the operating frequency is increased beyond the VHF range. The current is concentrated by the skin effect in a region near the surface, increasing the path length and decreasing the cross sectional area through which the current flows.
In FIGS. 3 and 4, a semi-insulating substrate 16 has N (approximately 10.sup.17 cm.sup.-3) and N+ (near 1.times.10.sup.18 cm.sup.-3) layers 18 and 20 selectively formed therein, for example by ion implantation. Schottky metal 22 forms the schottky junction 24 on the upper planar surface, and the ohmic contact is provided at 26. The smallest contact area achieved is about 10.sup.-6 cm.sup.2, and at best 10.sup.-7 cm.sup.2. The structure is not adaptable to reduce the series resistance below 5 ohms for a junction capacitance of 10.sup.-14 farads. The parasitic shunt capacitance can be high, and approach 10.sup.-13 farad. This parasitic capacitance can be detrimental to the efficient operation of such device as a detector or mixer in the low millimeter (200 to 300 gigahertz) to submillimeter (above 300 gigahertz) range and near the optical region.
As seen in FIGS. 1-4, in prior devices the schottky contact 2 or 24 to the N layer is either made through etched holes in a dielectric layer or deposited directly on the surface of the N layer and its area defined by standard etching techniques. The junction area is limited to about 10.sup.-6 cm.sup.2, and possibly approaching 10.sup.-7 cm.sup.2, by the line width and resolution capability of available photolithographic processing techniques.
For millimeter and submillimeter wave frequency applications, the junction diameter should be in the micron and submicron range. To produce a small junction using planar technology, a very thin oxide layer (less than 1,000 angstroms) is necessary because the junction is defined photolithographically on the oxide layer. The oxide layer, generally used also as the passivating layer, is then etched through to the active layer to provide for the deposition of the schottky barrier metal layer which forms the junction. If this oxide layer was made thick, poor junction definition may result because the etching would not proceed uniformly through a thick oxide layer. In addition, it is not possible to completely remove all the oxide including the native oxides of the semiconductor layer by this technique, whereby there cannot be consistently achieved a junction ideality factor below about 1.1. Furthermore, using the above planar technology, the smallest junction area that can be achieved is in the 10.sup.-7 to 10.sup.-8 cm.sup.2 range (junction diameter of 1 micron or greater). To achieve a junction area of about 10.sup.-10 cm.sup. 2 requires a junction diameter near 0.1 microns, which cannot be defined using existing techiques, including optical, X-ray or electron beam lithography.